Japanese Laid-Open Patent Publication No. 9-321434 describes an example of a multilayer wiring substrate used to mount electronic components. A multilayer wiring substrate includes insulative layers and wiring layers arranged on opposite sides of a core substrate. In such a wiring substrate, for example, the same number of insulative layers and wiring layers are arranged on each surface of the core substrate. A protective film is formed on an upper surface of the wiring substrate. Portions of a wiring pattern exposed through openings in the protective film are used as electrodes that are connected to electronic components such as semiconductor devices (LSI). A further protective film is formed on a lower surface of the wiring substrate. Portions of a wiring pattern exposed through openings in a protective film, which is formed on a lower surface of the wiring substrate, are used as electrodes that connect the wiring substrate to a mounting substrate.
In such a wiring substrate that, for example, arranges a semiconductor chip above the core substrate and connects a mounting substrate below the core substrate, an upper wiring pattern and a lower wiring pattern have different wire densities. The density difference is one factor that causes warping of the wiring substrate. A warped wiring substrate hinders the connection between the electrodes of the wiring substrate and the electrodes of the semiconductor device.
This may result in the occurrence of a connection failure between the wiring substrate and the semiconductor device.